This class has been cancelled.

Heterogeneous Programming in Modern C++ with SYCL is a two-day onsite training course with programming exercises, taught by Gordon Brown, James Reinders, Michael Wong, Rod Burns, and Ronan Keryell.  It is offered at the Gaylord Rockies from 09:00 to 17:00 Aurora time (MDT) on Saturday and Sunday, September 17th and 18th, 2022 (immediately following the conference). Lunch is included.

Course Description

Parallel programming can be used to take advantage of heterogeneous architectures including GPUs, FPGAs, XPUs, DSPs, NPUs, IPUs, TPUs or special units on CPUs to significantly increase the performance of applications. SYCL is an open standard programming model that is defined by the industry and lets developers support many of these processors from different vendors using a single code base and only modern standard C++ code.

This tutorial will give software developers the knowledge they need to begin developing parallel applications using C++ and the SYCL programming model. Our goal is to equip attendees with the skills they need to build highly performant applications that can be used in the fields of HPC and AI and deployed to multiple hardware platforms.

We will cover the fundamentals of the SYCL programming model before moving to more advanced topics. We will explore how SYCL can be used to write serious applications, covering intermediate to advanced features of SYCL as well as some of the tools and libraries that support SYCL application development.

This is a hands-on tutorial, attendees will work through exercises that represent key design patterns encountered by people who program heterogeneous systems and deploy this code to multiple processors from different vendors.

Parallel programming with heterogeneous architectures has gained a reputation for being difficult, but is it really? Modern C++ has come a long way to making parallel programming easier, and the SYCL programming model means heterogeneous programming using C++ is now more accessible than ever.

SYCL uses modern standard C++, and it’s a programming model that lets developers support a wide variety of devices (CPUs, GPUs, FPGAs, and more) from a single code base. Given the growing heterogeneity of processor roadmaps, moving to an open standard, platform-independent model (without vendor lock-in) is essential for modern software developers.

There are multiple implementations of SYCL available including open source projects, and in this tutorial you will join instructors who are developing some of these alongside experienced developers from academic institutions implementing complex SYCL code bases.

This tutorial will provide a way for developers to gain expertise with SYCL in a practical environment focused more on writing code than Powerpoint presentations. We give detailed design and code explanation, while allowing you to pick the brains of the industry’s top experts.

Attendees will gain a background of how the designers of the SYCL standard have addressed heterogeneous programming in C++ through industry collaboration. SYCL has gained widespread support in recent years and is available on Exascale systems, desktops, embedded systems, FPGAs, datacentres, and automotive platforms. Regardless of the particular constructs in the future – the material in this course will prove timeless.

This course will start by teaching the fundamentals of heterogeneous parallelism using SYCL. It will also teach you how to make use of modern C++ and the SYCL programming model to build parallel algorithms for heterogeneous devices. Most of the programming focus will be on GPUs, but some time will be spent applying the techniques to simple FPGA examples. The course will teach you how to apply some common GPU optimizations.

Why Is This Topic Relevant For Attendees?

SYCL is a programming model that lets developers support a wide variety of devices (CPUs, GPUs, FPGAs and more). There is growing interest in programming with SYCL in the HPC developer community, with the Aurora, Perlmutter, Polaris, LUMI and Frontier supercomputers enabling code portability using the SYCL standard. There are multiple implementations of SYCL available, from Codeplay’s ComputeCpp, Intel’s DPC++ and the hipSYCL project. This tutorial will provide a way for developers to gain expertise in this programming model in a practical environment whilst using all these SYCL implementations.

Prerequisites

This tutorial is targeted at attendees who have some previous experience in writing C++ applications, and would like to expand this knowledge to using SYCL for parallel programming. In particular, this tutorial will be most useful for software developers who are writing HPC applications for highly parallel heterogeneous systems.

Register Here

Course Instructors

Gordon Brown is a principal software engineer at Codeplay Software specializing in heterogeneous programming models for C++. He has been involved in the standardization of the Khronos standard SYCL and the development of Codeplay’s implementation of the standard; ComputeCpp, from its inception. More recently he has been involved in the efforts within SG1/SG14 to standardize execution and to bring heterogeneous computing to C++, including executors, topology discovery and affinity. Gordon is also a regular speaker at CppCon and teaches the CppCon class on parallelism and GPU programming in C++.

Michael Wong is a Distinguished Engineer at Codeplay Software, a Scottish company that produces compilers, debuggers, runtimes, testing systems, and other specialized tools to aid software development for heterogeneous systems, accelerators, and special purpose processor architectures, including GPUs and DSPs.For twenty years, he was the Senior Technical Strategy Architect for IBM compilers. Michael is also Chair of the Khronos C++ Heterogeneous Programming language SYCL, Editor for the Concurrency TS and the Transactional Memory TS, Canadian Head of Delegation to the ISO C++ Standard, Founding member of the ISO C++ Directions group, Director and VP of ISOCPP.org and Chair of al Programming Languages for Canada’s Standard Councils.

Rod Burns has been helping developers to build complex software for well over a decade with experience in organizing training, tutorials and workshops. At Codeplay Rod leads the effort to support and educate developers using SYCL. Rod helped to create “SYCL Academy,” an open source set of materials for teaching SYCL, that have already been adopted by some of the top universities in the world and has been used at multiple conferences to teach SYCL.

Ronan Keryell is principal software engineer at AMD working on high-level programming models for FPGA and is member of the Khronos OpenCL & SYCL C++ committee. Ronan Keryell received his MSc in Electrical Engineering and PhD in Computer Science from École Normale Supérieure of Paris (France), on the design of a massively parallel RISC-based VLIW-SIMD graphics computer and its programming environment.Ronan was assistant professor in the Computer Science department at MINES Paris Tech and later at Télécom Bretagne (France), working on automatic parallelization, compilation of PGAS languages (High-Performance Fortran), high-level synthesis and co-design, networking, and secure computing.He was co-founder of 3 start-ups, mainly in the area of High Performance Computing, and was the technical lead of the Par4All automatic parallelizer at SILKAN, targeting OpenMP, CUDA & OpenCL from sequential C & Fortran.

James Reinders has more than three decades experience in Parallel Computing and is an author/co-author/editor of ten technical books (most recent book teaches SYCL) related to parallel programming. James has helped teach tutorials and workshops at numerous events including SC, ISC, and SIGGRAPH, over the last few decades. He has had the great fortune to help make key contributions to two of the world’s fastest computers (#1 on Top500 list) as well as many other supercomputers, and software developer tools. James works to help enable and promote parallel programming in a heterogeneous world. James consistently enjoys writing, teaching, programming, and consulting in areas related to parallel computing (HPC and AI).